The manufacture of a metal-insulator-semiconductor field effect transistor (MISFET) device (e.g., a metal-oxide-semiconductor field effect transistor (MOSFET)) includes a number of critical photolithographic masking and alignment processes/steps.
U.S. Pat. No. 5,302,537 discusses the use of three mask processes for fabricating the active cell region and the termination region of a low-voltage MISFET. However, the processes described in that patent are inadequate for building a reliable high-voltage (greater than 80 volts (V)) device.
Field or termination rings that terminate the planar junction of the active cell region are commonly used to achieve a high-voltage device. U.S. Pat. No. 5,795,793 discusses the use of three mask processes for fabricating the active region of a MOSFET. An additional three masks are needed to form the termination rings, meaning at least six masks are needed to manufacture a high-voltage device.
Reducing the number of masks needed to manufacture a high-voltage device can decrease manufacturing costs and increase yield.